The present invention relates to digital counters, and more particularly to a digital counter having a dial position that includes a hardware part to determine the n lowest-value bits of the dial position and a software part to determine the remaining higher-value bits of the dial position.
Counters having both hardware and software parts are known, the hardware part often being realized through the use of flip-flops. Counters of this kind are used, for example, for assigning time stamps in devices for monitoring telecommunication links. As a time stamp, the relevant dial position is used. In order to minimize the effort, the hardware part is usually realized as a 16 to 32 bit counter. If there is an overflow, the software part is counted up by 1. For this, it must be taken into account that an overflow of the hardware part initiates an interrupt and that an interrupt server cannot, however, operate at any speed. In the area of the hardware part overflow, there is therefore a certain dead time. For example, there is conceivably a situation in which the hardware part is already back to 0000 . . . , but the software part has not yet counted up. If this data were to be selected for a time stamp, the clock would practically count backwards. Consequently, the result would be incorrect.
In order to prevent this the hardware part of the counter is read twice to be on the safe side, so that the assignment of lower-value and higher-value bits can proceed correctly. Accordingly, if the second value is smaller than the value read first, there has been an overflow. Accordingly, the dial position resulting from the software part and the second read hardware and software part is the correct one.
However, this solution cannot be used in those cases where a processor can only process one interrupt at a time. There may be situations in which the processor receives an interrupt from the overflow of the hardware part and at the same time an interrupt from the event that is to be provided with a time stamp. The processor will be blocked until the first interrupt has been processed and will then assign an incorrect time stamp to the event.
What is desired is to eliminate this problem which results with a generic counter, and to provide a corresponding method for operating a digital counter which eliminates this problem.